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Twisted-1.3.0.tar.gz
Twisted-1.3.0/*
++dist/*
docs/*.aux
docs/*.dvi
docs/*.log
docs/user/user.css
docs/user/user.html
extras/mini-os/h/hypervisor-ifs
--dist/*
++install/*
linux-*-xen0/*
linux-*-xenU/*
--linux-xen-sparse
linux-*.patch
++linux-xen-sparse
+mkddbxen
netbsd-*-tools/*
netbsd-*-xen0/*
netbsd-*-xenU/*
netbsd-*.patch
++patches/ebtables-brnf-5_vs_2.4.25.diff
++patches/ebtables.diff
patches/tmp/*
pristine-*
tools/*/build/lib*/*.py
tools/misc/miniterm/miniterm
tools/misc/xen_cpuperf
tools/web-shutdown.tap
++tools/x2d2/minixend
tools/xentrace/xentrace
tools/xfrd/xfrd
+ xen/arch/x86/asm-offsets.s
xen/arch/x86/boot/mkelf32
+xen/ddb/*
xen/drivers/pci/classlist.h
xen/drivers/pci/devlist.h
xen/drivers/pci/gen-devlist
xen/xen
xen/xen-syms
xen/xen.*
--install/*
--patches/ebtables-brnf-5_vs_2.4.25.diff
--patches/ebtables.diff
--tools/x2d2/minixend
* We're basically forcing default RPLs to 1, so that our "what privilege
* level are we returning to?" logic works.
*/
- ed->failsafe_selector = FLAT_GUESTOS_CS;
- ed->event_selector = FLAT_GUESTOS_CS;
- p->thread.failsafe_selector = FLAT_GUESTOS_CS;
- p->thread.event_selector = FLAT_GUESTOS_CS;
- p->thread.guestos_ss = FLAT_GUESTOS_DS;
++ ed->thread.failsafe_selector = FLAT_GUESTOS_CS;
++ ed->thread.event_selector = FLAT_GUESTOS_CS;
+ ed->thread.guestos_ss = FLAT_GUESTOS_DS;
for ( i = 0; i < 256; i++ )
- p->thread.traps[i].cs = FLAT_GUESTOS_CS;
+ ed->thread.traps[i].cs = FLAT_GUESTOS_CS;
/* WARNING: The new domain must have its 'processor' field filled in! */
l2start = l2tab = (l2_pgentry_t *)mpt_alloc; mpt_alloc += PAGE_SIZE;
struct xen_regs *regs,
long error_code, int use_error_code)
{
- struct domain *d = current;
- struct trap_bounce *tb = &d->thread.trap_bounce;
+ struct exec_domain *ed = current;
- struct guest_trap_bounce *gtb = guest_trap_bounce+smp_processor_id();
++ struct trap_bounce *tb = &ed->thread.trap_bounce;
trap_info_t *ti;
unsigned long fixup;
goto xen_fault;
ti = current->thread.traps + trapnr;
- gtb->flags = use_error_code ? GTBF_TRAP : GTBF_TRAP_NOCODE;
- gtb->error_code = error_code;
- gtb->cs = ti->cs;
- gtb->eip = ti->address;
+ tb->flags = use_error_code ? TBF_TRAP : TBF_TRAP_NOCODE;
+ tb->error_code = error_code;
+ tb->cs = ti->cs;
+ tb->eip = ti->address;
if ( TI_GET_IF(ti) )
- d->shared_info->vcpu_data[0].evtchn_upcall_mask = 1;
+ ed->vcpu_info->evtchn_upcall_mask = 1;
return;
xen_fault:
asmlinkage void do_int3(struct xen_regs *regs, long error_code)
{
- struct domain *d = current;
- struct trap_bounce *tb = &d->thread.trap_bounce;
+ struct exec_domain *ed = current;
- struct guest_trap_bounce *gtb = guest_trap_bounce+smp_processor_id();
++ struct trap_bounce *tb = &ed->thread.trap_bounce;
trap_info_t *ti;
DEBUGGER_trap_entry(TRAP_int3, regs, error_code);
}
ti = current->thread.traps + 3;
- gtb->flags = GTBF_TRAP_NOCODE;
- gtb->error_code = error_code;
- gtb->cs = ti->cs;
- gtb->eip = ti->address;
+ tb->flags = TBF_TRAP_NOCODE;
+ tb->error_code = error_code;
+ tb->cs = ti->cs;
+ tb->eip = ti->address;
if ( TI_GET_IF(ti) )
- d->shared_info->vcpu_data[0].evtchn_upcall_mask = 1;
+ ed->vcpu_info->evtchn_upcall_mask = 1;
}
asmlinkage void do_double_fault(void)
asmlinkage void do_page_fault(struct xen_regs *regs, long error_code)
{
- struct guest_trap_bounce *gtb = guest_trap_bounce+smp_processor_id();
trap_info_t *ti;
unsigned long off, addr, fixup;
- struct domain *d = current;
+ struct exec_domain *ed = current;
+ struct domain *d = ed->domain;
extern int map_ldt_shadow_page(unsigned int);
- struct trap_bounce *tb = &d->thread.trap_bounce;
- int cpu = d->processor;
++ struct trap_bounce *tb = &ed->thread.trap_bounce;
+ int cpu = ed->processor;
+ int ret;
__asm__ __volatile__ ("movl %%cr2,%0" : "=r" (addr) : );
if ( unlikely(!(regs->cs & 3)) )
goto xen_fault;
- ti = d->thread.traps + 14;
+ ti = ed->thread.traps + 14;
- gtb->flags = GTBF_TRAP_CR2; /* page fault pushes %cr2 */
- gtb->cr2 = addr;
- gtb->error_code = error_code;
- gtb->cs = ti->cs;
- gtb->eip = ti->address;
+ tb->flags = TBF_TRAP_CR2; /* page fault pushes %cr2 */
+ tb->cr2 = addr;
+ tb->error_code = error_code;
+ tb->cs = ti->cs;
+ tb->eip = ti->address;
if ( TI_GET_IF(ti) )
- d->shared_info->vcpu_data[0].evtchn_upcall_mask = 1;
+ ed->vcpu_info->evtchn_upcall_mask = 1;
return;
xen_fault:
asmlinkage void do_general_protection(struct xen_regs *regs, long error_code)
{
- struct domain *d = current;
+ struct exec_domain *ed = current;
+ struct domain *d = ed->domain;
- struct guest_trap_bounce *gtb = guest_trap_bounce+smp_processor_id();
+ struct trap_bounce *tb = &d->thread.trap_bounce;
trap_info_t *ti;
unsigned long fixup;
/* Pass on GPF as is. */
ti = current->thread.traps + 13;
- gtb->flags = GTBF_TRAP;
- gtb->error_code = error_code;
+ tb->flags = TBF_TRAP;
+ tb->error_code = error_code;
finish_propagation:
- gtb->cs = ti->cs;
- gtb->eip = ti->address;
+ tb->cs = ti->cs;
+ tb->eip = ti->address;
if ( TI_GET_IF(ti) )
- d->shared_info->vcpu_data[0].evtchn_upcall_mask = 1;
+ ed->vcpu_info->evtchn_upcall_mask = 1;
return;
gp_in_kernel:
restore_fpu(current);
else
init_fpu();
- set_bit(DF_USEDFPU, ¤t->flags); /* so we fnsave on switch_to() */
+ set_bit(EDF_USEDFPU, ¤t->ed_flags); /* so we fnsave on switch_to() */
}
- if ( test_and_clear_bit(DF_GUEST_STTS, ¤t->flags) )
+ if ( test_and_clear_bit(EDF_GUEST_STTS, ¤t->ed_flags) )
{
- struct guest_trap_bounce *gtb = guest_trap_bounce+smp_processor_id();
- gtb->flags = GTBF_TRAP_NOCODE;
- gtb->cs = current->thread.traps[7].cs;
- gtb->eip = current->thread.traps[7].address;
+ struct trap_bounce *tb = ¤t->thread.trap_bounce;
+ tb->flags = TBF_TRAP_NOCODE;
+ tb->cs = current->thread.traps[7].cs;
+ tb->eip = current->thread.traps[7].address;
}
}
asmlinkage void do_debug(struct xen_regs *regs, long error_code)
{
unsigned int condition;
- struct exec_domain *tsk = current;
- struct guest_trap_bounce *gtb = guest_trap_bounce+smp_processor_id();
- struct domain *d = current;
- struct trap_bounce *tb = &d->thread.trap_bounce;
++ struct exec_domain *d = current;
++ struct trap_bounce *tb = &ed->thread.trap_bounce;
DEBUGGER_trap_entry(TRAP_debug, regs, error_code);
unsigned long failsafe_selector,
unsigned long failsafe_address)
{
- struct exec_domain *p = current;
- struct domain *d = current;
++ struct exec_domain *d = current;
if ( !VALID_CODESEL(event_selector) || !VALID_CODESEL(failsafe_selector) )
return -EPERM;
/* No special register assumptions */
failsafe_callback:
GET_CURRENT(%ebx)
- movl EDOMAIN_processor(%ebx),%eax
- shl $4,%eax
- lea guest_trap_bounce(%eax),%edx
- leal DOMAIN_trap_bounce(%ebx),%edx
- movl DOMAIN_failsafe_addr(%ebx),%eax
++ leal EDOMAIN_trap_bounce(%ebx),%edx
+ movl EDOMAIN_failsafe_addr(%ebx),%eax
- movl %eax,GTB_eip(%edx)
+ movl %eax,TRAPBOUNCE_eip(%edx)
- movl DOMAIN_failsafe_sel(%ebx),%eax
+ movl EDOMAIN_failsafe_sel(%ebx),%eax
- movw %ax,GTB_cs(%edx)
+ movw %ax,TRAPBOUNCE_cs(%edx)
call create_bounce_frame
subl $16,%esi # add DS/ES/FS/GS to failsafe stack frame
movl XREGS_ds(%esp),%eax
test %ecx,SYMBOL_NAME(irq_stat)(%eax,1)
jnz process_softirqs
/*test_guest_events:*/
- movl DOMAIN_shared_info(%ebx),%eax
- testb $0xFF,SHINFO_upcall_mask(%eax)
+ movl EDOMAIN_vcpu_info(%ebx),%eax
+ testb $0xFF,VCPUINFO_upcall_mask(%eax)
jnz restore_all_guest
- testb $0xFF,SHINFO_upcall_pending(%eax)
+ testb $0xFF,VCPUINFO_upcall_pending(%eax)
jz restore_all_guest
- movb $1,SHINFO_upcall_mask(%eax) # Upcalls are masked during delivery
+ movb $1,VCPUINFO_upcall_mask(%eax) # Upcalls are masked during delivery
/*process_guest_events:*/
- movl EDOMAIN_processor(%ebx),%edx
- shl $4,%edx # sizeof(guest_trap_bounce) == 16
- lea guest_trap_bounce(%edx),%edx
- leal DOMAIN_trap_bounce(%ebx),%edx
- movl DOMAIN_event_addr(%ebx),%eax
++ leal EDOMAIN_trap_bounce(%ebx),%edx
+ movl EDOMAIN_event_addr(%ebx),%eax
- movl %eax,GTB_eip(%edx)
+ movl %eax,TRAPBOUNCE_eip(%edx)
- movl DOMAIN_event_sel(%ebx),%eax
+ movl EDOMAIN_event_sel(%ebx),%eax
- movw %ax,GTB_cs(%edx)
+ movw %ax,TRAPBOUNCE_cs(%edx)
call create_bounce_frame
jmp restore_all_guest
ALIGN
process_guest_exception_and_events:
- movl EDOMAIN_processor(%ebx),%eax
- shl $4,%eax
- lea guest_trap_bounce(%eax),%edx
- testb $~0,GTB_flags(%edx)
- leal DOMAIN_trap_bounce(%ebx),%edx
++ leal EDOMAIN_trap_bounce(%ebx),%edx
+ testb $~0,TRAPBOUNCE_flags(%edx)
jz test_all_events
call create_bounce_frame # just the basic frame
- mov GTB_flags(%edx),%cl
- test $GTBF_TRAP_NOCODE,%cl
+ mov TRAPBOUNCE_flags(%edx),%cl
+ test $TBF_TRAP_NOCODE,%cl
jnz 2f
subl $4,%esi # push error_code onto guest frame
- movl GTB_error_code(%edx),%eax
+ movl TRAPBOUNCE_error_code(%edx),%eax
FAULT13:movl %eax,%gs:(%esi)
- test $GTBF_TRAP_CR2,%cl
+ test $TBF_TRAP_CR2,%cl
jz 1f
subl $4,%esi # push %cr2 onto guest frame
- movl GTB_cr2(%edx),%eax
+ movl TRAPBOUNCE_cr2(%edx),%eax
FAULT14:movl %eax,%gs:(%esi)
1: movl %esi,XREGS_esp(%esp)
- 2: movb $0,GTB_flags(%edx)
+ 2: movb $0,TRAPBOUNCE_flags(%edx)
jmp test_all_events
ALIGN
*/
int gpf_emulate_4gb(struct xen_regs *regs)
{
- struct domain *d = current;
+ struct exec_domain *d = current;
trap_info_t *ti;
- struct guest_trap_bounce *gtb;
+ struct trap_bounce *tb;
u8 modrm, mod, reg, rm, decode;
void *memreg, *regreg;
unsigned long offset;
perfc_incrc(seg_fixups);
/* If requested, give a callback on otherwise unused vector 15. */
- if ( VM_ASSIST(d, VMASST_TYPE_4gb_segments_notify) )
+ if ( VM_ASSIST(d->domain, VMASST_TYPE_4gb_segments_notify) )
{
ti = &d->thread.traps[15];
- gtb = &guest_trap_bounce[d->processor];
- gtb->flags = GTBF_TRAP;
- gtb->error_code = pb - eip;
- gtb->cs = ti->cs;
- gtb->eip = ti->address;
+ tb = &d->thread.trap_bounce;
+ tb->flags = TBF_TRAP;
+ tb->error_code = pb - eip;
+ tb->cs = ti->cs;
+ tb->eip = ti->address;
if ( TI_GET_IF(ti) )
- d->shared_info->vcpu_data[0].evtchn_upcall_mask = 1;
+ d->vcpu_info->evtchn_upcall_mask = 1;
}
return 1;
#include <xen/config.h>
#include <xen/spinlock.h>
#include <public/xen.h>
+ #endif
+
+ /*
+ * CPU vendor IDs
+ */
+ #define X86_VENDOR_INTEL 0
+ #define X86_VENDOR_CYRIX 1
+ #define X86_VENDOR_AMD 2
+ #define X86_VENDOR_UMC 3
+ #define X86_VENDOR_NEXGEN 4
+ #define X86_VENDOR_CENTAUR 5
+ #define X86_VENDOR_RISE 6
+ #define X86_VENDOR_TRANSMETA 7
+ #define X86_VENDOR_NSC 8
+ #define X86_VENDOR_SIS 9
+ #define X86_VENDOR_UNKNOWN 0xff
+
+ /*
+ * EFLAGS bits
+ */
+ #define X86_EFLAGS_CF 0x00000001 /* Carry Flag */
+ #define X86_EFLAGS_PF 0x00000004 /* Parity Flag */
+ #define X86_EFLAGS_AF 0x00000010 /* Auxillary carry Flag */
+ #define X86_EFLAGS_ZF 0x00000040 /* Zero Flag */
+ #define X86_EFLAGS_SF 0x00000080 /* Sign Flag */
+ #define X86_EFLAGS_TF 0x00000100 /* Trap Flag */
+ #define X86_EFLAGS_IF 0x00000200 /* Interrupt Flag */
+ #define X86_EFLAGS_DF 0x00000400 /* Direction Flag */
+ #define X86_EFLAGS_OF 0x00000800 /* Overflow Flag */
+ #define X86_EFLAGS_IOPL 0x00003000 /* IOPL mask */
+ #define X86_EFLAGS_NT 0x00004000 /* Nested Task */
+ #define X86_EFLAGS_RF 0x00010000 /* Resume Flag */
+ #define X86_EFLAGS_VM 0x00020000 /* Virtual Mode */
+ #define X86_EFLAGS_AC 0x00040000 /* Alignment Check */
+ #define X86_EFLAGS_VIF 0x00080000 /* Virtual Interrupt Flag */
+ #define X86_EFLAGS_VIP 0x00100000 /* Virtual Interrupt Pending */
+ #define X86_EFLAGS_ID 0x00200000 /* CPUID detection flag */
+
+ /*
+ * Intel CPU flags in CR0
+ */
+ #define X86_CR0_PE 0x00000001 /* Enable Protected Mode (RW) */
+ #define X86_CR0_MP 0x00000002 /* Monitor Coprocessor (RW) */
+ #define X86_CR0_EM 0x00000004 /* Require FPU Emulation (RO) */
+ #define X86_CR0_TS 0x00000008 /* Task Switched (RW) */
+ #define X86_CR0_NE 0x00000020 /* Numeric Error Reporting (RW) */
+ #define X86_CR0_WP 0x00010000 /* Supervisor Write Protect (RW) */
+ #define X86_CR0_AM 0x00040000 /* Alignment Checking (RW) */
+ #define X86_CR0_NW 0x20000000 /* Not Write-Through (RW) */
+ #define X86_CR0_CD 0x40000000 /* Cache Disable (RW) */
+ #define X86_CR0_PG 0x80000000 /* Paging (RW) */
+
+ /*
+ * Intel CPU features in CR4
+ */
+ #define X86_CR4_VME 0x0001 /* enable vm86 extensions */
+ #define X86_CR4_PVI 0x0002 /* virtual interrupts flag enable */
+ #define X86_CR4_TSD 0x0004 /* disable time stamp at ipl 3 */
+ #define X86_CR4_DE 0x0008 /* enable debugging extensions */
+ #define X86_CR4_PSE 0x0010 /* enable page size extensions */
+ #define X86_CR4_PAE 0x0020 /* enable physical address extensions */
+ #define X86_CR4_MCE 0x0040 /* Machine check enable */
+ #define X86_CR4_PGE 0x0080 /* enable global pages */
+ #define X86_CR4_PCE 0x0100 /* enable performance counters at ipl 3 */
+ #define X86_CR4_OSFXSR 0x0200 /* enable fast FPU save and restore */
+ #define X86_CR4_OSXMMEXCPT 0x0400 /* enable unmasked SSE exceptions */
+
+ /*
+ * 'trap_bounce' flags values.
+ */
+ #define TBF_TRAP 1
+ #define TBF_TRAP_NOCODE 2
+ #define TBF_TRAP_CR2 4
+
+ #ifndef __ASSEMBLY__
struct domain;
+struct exec_domain;
/*
* Default implementation of macro that returns current
&((_p)->fast_trap_desc), 8))
#endif
-long set_fast_trap(struct domain *p, int idx);
+long set_fast_trap(struct exec_domain *p, int idx);
- #define INIT_THREAD { \
- 0, 0, \
- { [0 ... 7] = 0 }, /* debugging registers */ \
- { { 0, }, }, /* 387 state */ \
- { 0 }, \
- 0x20, { 0, 0 }, /* DEFAULT_FAST_TRAP */ \
- { {0} } /* io permissions */ \
- }
+ #define INIT_THREAD { fast_trap_idx: 0x20 }
#elif defined(__x86_64__)
int init_event_channels(struct domain *d);
void destroy_event_channels(struct domain *d);
-struct domain
+struct exec_domain
{
- /*
- * DO NOT CHANGE THE ORDER OF THE FOLLOWING.
- * Their offsets are hardcoded in entry.S
- */
-
- u32 processor; /* 00: current processor */
-
- /* An unsafe pointer into a shared data area. */
- vcpu_info_t *vcpu_info; /* 04: vcpu info pointer */
-
- /*
- * Return vectors pushed to us by guest OS.
- * The stack frame for events is exactly that of an x86 hardware interrupt.
- * The stack frame for a failsafe callback is augmented with saved values
- * for segment registers %ds, %es, %fs and %gs:
- * %ds, %es, %fs, %gs, %eip, %cs, %eflags [, %oldesp, %oldss]
- */
- unsigned long event_selector; /* 08: entry CS */
- unsigned long event_address; /* 12: entry EIP */
-
- unsigned long failsafe_selector; /* 16: entry CS */
- unsigned long failsafe_address; /* 20: entry EIP */
-
- /*
- * From here on things can be added and shuffled without special attention
- */
+ u32 processor;
+
+ shared_info_t *shared_info;
- domid_t id;
- s_time_t create_time;
+ struct domain *domain;
+ struct exec_domain *ed_next_list;
+ int eid;
+
+ struct mm_struct mm;
+
+ struct thread_struct thread;
+
+ struct ac_timer timer; /* one-shot timer for timeout values */
+
+ s_time_t lastschd; /* time this domain was last scheduled */
+ s_time_t lastdeschd; /* time this domain was last descheduled */
+ s_time_t cpu_time; /* total CPU time received till now */
+ s_time_t wokenup; /* time domain got woken up */
+ void *ed_sched_priv; /* scheduler-specific data */
+
+ unsigned long ed_flags;
+
+ u16 virq_to_evtchn[NR_VIRQS];
+
+ atomic_t pausecnt;
+
+};
+
+#if 01
+#define LOCK_BIGLOCK(_d) spin_lock(&(_d)->big_lock)
+#define UNLOCK_BIGLOCK(_d) spin_unlock(&(_d)->big_lock)
+#else
+#define LOCK_BIGLOCK(_d) (void)(_d)
+#define UNLOCK_BIGLOCK(_d)
+#endif
+
+struct domain {
+ domid_t id;
+ s_time_t create_time;
+
+ shared_info_t *shared_info; /* shared data area */
+ spinlock_t time_lock;
+
+ spinlock_t big_lock;
+
+ l1_pgentry_t *mm_perdomain_pt;
spinlock_t page_alloc_lock; /* protects all the following fields */
struct list_head page_list; /* linked list, of size tot_pages */
projects / xen.git / commitdiff